Cerium Laboratories LLC has been supporting several small businesses engaged in R&D activities for various branches of the military under Small Business Innovation Research (SBIR) programs. In that capacity, Cerium works as a contractor to provide analytical services and reverse engineering activities to study failure mechanisms and to improve materials under development for the government.
Our most recent success was a Phase-II activity for the US Navy’s obsolete electronics re-engineering program (NAVAIR solicitation). In that work, we teamed up with Crossfield Technology Inc, also of Austin TX, to recreate an obsolete ASIC device. Cerium conducted technique development activity to prepare, delayer, and capture SEM micrographs of the whole device, layer by layer. We also directed a software development effort to create a tool that stitches a large volume of images together, and extracts circuit features from them.
The captured SEM images were used to build two-dimensional extreme field of view SEM composite images (Fig. 1) that allowed us to acquire the layout of the device and re-create EDA files in GDS-II format. The files were used to compile a three dimensional model (Fig. 2), and allowed the device to be constructed in SPICE and evaluated prior to optimization of lithograph masks for the re-engineered device manufactured on a modern process flow at a trusted foundry. The program has entered the Phase-III Commercialization Pilot Program.
Fig. 1 a) Full die mosaic consisting of 12 arrays. Each array contains 900 individual images taken at high resolution (b)
Fig. 2 3D model of multiple metal layers and vias
The software application package developed for this project has since become the backbone for a commercial product used in optimization of mask layouts by Optical Proximity Correction (OPC) calculations, ChipinsightTM, marketed by Smart Imaging Technologies of Houston, TX.
Stemming from this success, the Office of the Secretary of Defense (OSD) last year funded a new SBIR program directed to design structures and devices that will provide means to quickly identify incomplete copies and to prevent counterfeiting of sensitive VLSI circuits by physical pattern capture. (OSD10-A04) Our team has been awarded funding for the Phase-I proposal.
In addition, Cerium Laboratories has recently participated in the development of a Phase-I SBIR proposal to design high volume manufacturing process for low defect (211) Si substrates for applications in HgCdTe heteroepitaxy for thermal imaging sensors. The work will scale from 3” substrates in early stages to 200-mm wafers in the Phase-II work. This proposal was submitted jointly with Amethyst Research Corp. of Oklahoma City, OK in January 2011. Similarly, we are collaborating with Texas State University researchers to leverage their expertise in Molecular Beam Epitaxy (MBE) to design a novel high RF frequency tunable thin film filter. The FBAR design has been solicited by the Army, for application in ground radar systems. This collaboration is extending our involvement with educational institutions and government agencies through participation in STTR programs.